1. Field of the Invent/on
The invention in general relates to the fabrication of layered superlattice materials, and more particularly to fabrication processes that provide low fatigue ferroelectric and reliable high dielectric constant integrated circuit devices that are unusually resistant to degradation.
2. Statement of the Problem
Copending U.S. patent application Ser. No. 07/965,190 filed Oct. 23, 1992 discloses that the layered superlattice materials discovered by G. A. Smolenskii, V. A. Isupov, and A. I. Agranovskaya (See Chapter 15 of the book, Ferroelectrics and Related Materials, ISSN 0275-9608, [V.3 of the series Ferroelectrics and Related Phenomena, 1984] edited by G. A. Smolenskii, especially sections 15.3-15) are far better suited for ferroelectric and high dielectric constant integrated circuit applications than any prior materials used for these applications. These layered superlattice materials comprise complex oxides of metals, such as strontium, calcium, barium, bismuth, cadmium, lead, titanium, tantalum, hafnium, tungsten, niobium zirconium, bismuth, scandium, yttrium, lanthanum, antimony, chromium, and thallium that spontaneously form layered superlattices, i.e. crystalline lattices that include alternating layers of distinctly different sublattices, such as a ferroelectric and non-ferroelectric sublattices. Generally, each layered superlattice material will include two or more of the above metals; for example, strontium, bismuth and tantalum form the layered superlattice material strontium bismuth tantalate, SrBi.sub.2 Ta.sub.2 O.sub.9. Copending U.S. patent application Ser. No. 07/981,133, describes a method of fabricating layered superlattice thin films that results in electronic properties for these materials several times better than the best previously known. This disclosure more fully develops certain aspects of the previous application, and discloses improvements in the fabrication process that together approximately double the values of the critical ferroelectric parameters, such as the polarizability, over the values obtained with the basic process described in the copending Ser. No. 981,133 application.
In addition to having good values of the ferroelectric parameters, it is also important that the physical quality of the ferroelectric films be suitable for use in manufacturing processes. For example, the film should have a relatively uniform grain size, which results in better crystalline quality, i.e films free of cracks and other defects. The film grain size should also be small compared to the thickness of the film; otherwise the roughness of the film can be comparable to the thickness and other dimensions of the device components, which makes it difficult or impossible to fabricate devices within tolerances and results in short circuits and other electrical breakdowns. Further, it is important that the fabrication processes be ones that can be performed relatively rapidly, since long processes are more expensive in terms of the use of facilities and personnel.
Rapid thermal processing and furnace annealing in an atmosphere of oxygen are several of many processes that are well-known in the thin-film fabrication technology, See for example, "Process Optimization and Characterization of Device Worthy Sol-Gel Based PZT for Ferroelectric Memories", B. M. Melnick, J. D. Cuchiaro, L. D. McMillan, C. A. Paz De Araujo, and J. F. Scott in Ferroelectrics, Vol 109, pp. 123 (1990). It is also known to add excess lead in fabricating PZT using a spin-on and annealing process to account for lead lost as lead oxide vapor in the fabrication process. See U.S. Pat. No. 5,028,455 issued to William D. Miller et al. It is also known to add excess Bi.sub.2 O.sub.3 when fabricating a bismuth titanate thin film using sputtering to compensate for the loss of this component in the sputtering process. See "A New Ferroelectric Memory Device, MetaI-Ferroelectric-Semiconductor Transistor", by Shu-Yau Wu, IEEE Transactions On Electron Devices, August 1974, pp. 499-504. E. C. Subbarao, in "A Family of Ferroelectric Bismuth Compounds", J. Phys. Chem. Solids, V. 23, pp. 665-676 (1962), discloses the creation of solid solutions of some layered superlattice materials and that several of their physical parameters, i.e., the dielectric constant and Curie temperature change as the proportions of the various elements comprising the solid solution change. However, these are only some of the hundreds of processes and parameters that potentially can affect the quality of a layered superlattice material, and prior to the work of the present inventors, how to use these and other fabrication parameters to arrive at ferroelectric properties such as extremely low fatigue rates and polarizabilities as high as 25 in layered superlattice materials was unknown, despite the fact that those skilled in the art had been searching for materials with such properties for more than thirty years.
It is a common practice to use recorded data regarding processes and. materials in designing electronic devices. Generally, in designing electronic devices, one goes to literature to discover processes that result in the desired products, uses tables and similar recorded material to select materials with the desire properties, and likewise may use tables and similar sources to select the specific process parameters. However the data is scattered and disconnected. For example, the properties used in selecting materials and the processes used in fabricating a silicon-based electronic device are usually found in a different source and are not related in a systematic way to a the materials and processes used in fabricating a gallium arsenide-based electronic device. Despite the long history of integrated circuit manufacturing and the wealth of data available, as often as not the specifics of the materials and processes are selected through trial and error.
3. Solution to the problem:
The present invention solves the above problem by providing a method of fabricating a layered superlattice material comprising the steps of: providing a substrate, and a precursor containing a metal; applying the precursor to the substrate; and rapid thermal processing (RTP bake) the precursor on the substrate to form a layered superlattice material containing the metal on the substrate. The RTP bake is performed between 500.degree. C. and 850.degree. C. The RTP bake is followed by furnace annealing at a temperature of between 700.degree. C. and 850.degree. C. Both the RTP bake and furnace anneal are best performed in an oxygen-enriched atmosphere.
When the layered superlattice material comprises a thin ferroelectric film which forms the material between the two electrodes of a capacitor, the best results are obtained if a first furnace anneal is performed after the layered superlattice material is formed and a second furnace anneal is performed after the second electrode is deposited. The second anneal may take place before or after the capacitor is patterned, or alternatively, a second anneal may be performed prior to patterning and a third anneal performed after patterning. The second and third anneal processes are performed at a temperature lower than the first anneal temperature.
If the material is one having the formula SrBi.sub.4-2x+.alpha. {(Ta.sub.y,Nb.sub.1-y).sub.x,(Ti.sub.z,Zr.sub.1-z).sub.2-2x }.sub.2 O.sub.15-6x, where 0.ltoreq.x.ltoreq.1.0, 0.ltoreq.y.ltoreq.1.0, 0.ltoreq.z.ltoreq.1.0, and x-2.ltoreq..alpha..ltoreq.1.6(2-x), preferably, 0.7.ltoreq.x.ltoreq.1.0, 0.8.ltoreq.y.ltoreq.1.0, 0.6.ltoreq.z.ltoreq.1.0, and 0.ltoreq..alpha..ltoreq.0.8(2-x), RTP baking is necessary to obtain ferroelectrics with high polarizability. RTP baking is not always necessary when using a precursor of high bismuth content, i.e a material having the following composition: SrBi.sub.4-2x+.alpha. {(Ta.sub.y,Nb.sub.1-y).sub.x,(Ti.sub.z,Zr.sub.1-z).sub.2-2x }.sub.2 O.sub.15-6x, where 0.ltoreq.x.ltoreq.1.0, 0.ltoreq.y.ltoreq.1.0, 0.ltoreq.z.ltoreq.1.0, and 0.ltoreq..alpha..ltoreq.1.6(2-x), preferably, 0.7.ltoreq.x.ltoreq.1.0, 0.8.ltoreq.y.ltoreq.1.0, 0.6.ltoreq.z.ltoreq.1.0, and 0.ltoreq..alpha..ltoreq.1.2(2-x).
Prebaking the substrate to a temperature above the temperature of the rapid thermal anneal step prior to the step of applying the precursor to the substrate is also a key factor in obtaining high performance ferroelectrics.
The invention also provides a method of fabricating a layered superlattice material comprising the steps of: providing a precursor comprising a metal dissolved in a solvent, the solvent having a first value of solvent parameter; adding a predetermined quantity of a second solvent to the precursor, the solvent having a second value of the solvent parameter different than the first value; the predetermined quantity being such that the precursor has a desired value of the solvent parameter different than the first value and the second value; applying the precursor to a substrate; and treating the precursor to form a layered superlattice material on the substrate. Preferably the solvent parameter comprises a parameter selected from the group comprising solubility, viscosity, and boiling point. Particularly if one of the metals in the layered superlattice material is strontium, the quality of the film is greatly enhanced if n-butyl acetate is one of the solvents.
If one of the metals is bismuth, the polarizability of the ferroelectric is greatly enhanced if about 125% of the normal stoichiometric amount of bismuth is added.
The invention also provides a process comprising the steps of: providing a substrate; forming a first thin film, the step of forming a first thin film including the step of applying a first precursor solution for a layered superlattice material to the substrate, the precursor solution having a first relative amount of a first element of the layered superlattice material as compared to a second element of the layered superlattice material; forming a second thin film, the step of forming a second thin film including the step of applying a second precursor solution for the layered superlattice material, the second precursor solution having a second relative amount of the first element of the layered superlattice material as compared to the second element to form a second thin film; and heating the first and second thin films to form the layered superlattice thin film. Preferably, the first precursor solution comprises a stoichiometric solution and the second precursor solution comprises a solution having an excess amount of the first element. Preferably, the first element comprises an element selected from the group comprising bismuth, lead, thallium and antimony. Preferably, the thickness of the second film is less than 50% of the total thickness of the layered superlattice thin film. Thus, for example in the case of the first element being bismuth, there is a bismuth gradient in the uncured film, with more bismuth being present in the layer most distal from the substrate, which layer is exposed during the heating process which creates the crystalline phase of the film. The step of heating preferably comprises annealing in a furnace, and also preferably includes a rapid thermal processing step. The first and second thin films are preferably formed using several coats of the precursor and after each coat the thin films are rapid thermally processed. The process results in a layered superlattice material having an average grain size of from 20 to 200 nm. As compared to the prior art, the process reduces the grain size of the material while reducing the distribution of grain sizes, thus improving the crystallinity of the film. At the same time the process shortens the fabrication time, since the material reaches high values of 2Pr with shorter furnace anneal time.
However, it may not be desirable to use the amount of bismuth that results in the optimum polarizability; it has been found that the electronic parameters vary so regularly with the proportion of bismuth and other elements, such as tantalum, niobium, and titanium, used, and there is such an incredible variety of layered superlattice materials available, that one can design electrical devices by choosing a proportion of elements used in the layered superlattice material that result in the desired electronic properties for the device. Thus the invention also provides a method of making an electrical or electronic device, the method comprising: providing a record of the values of one or more electronic properties of a layered superlattice material as a substantially continuous function of the relative amount of at least one element; selecting a layered superlattice material from the record having a composition corresponding to a desired value of at least one electronic property; and fabricating an electrical or electronic device including the selected layered superlattice material having the composition corresponding to the desired value.
The above method of designing an electrical or electronic device is particularly applicable to devices including layered superlattice materials that include solid solutions of several layered superlattice compounds. In this aspect the invention solves the problem of fabricating high performance ferroelectric and high dielectric constant devices by providing a method of making an electrical or electronic device, the method comprising: providing a record of the values of one or more electronic properties of a layered superlattice solid solution as a substantially continuous function of the proportion of the components of the solid solution; selecting a solid solution from the record with a composition having a desired value of at least one electronic property; and fabricating an electrical or electronic device including a layered superlattice material having the selected composition. The electronic properties may comprise one or more properties selected from the group comprising polarizability, coercive field, leakage current, dielectric constant, and fatigue. The elements that form the solid solution may include elements selected from the group comprising tantalum, niobium, titanium, zirconium and many other elements.
The invention also provides a method of making an electrical or electronic device, the method comprising: providing a record of the values of one or more electronic properties of a layered superlattice material as a substantially continuous function of the value of a fabrication process parameter; selecting a value of a process parameter from the record corresponding to a desired value of at least one electronic property; and making an electrical or electronic device including the layered superlattice material fabricated in a process having substantially the value corresponding to the desired value of at least one electronic property. As indicated above, the one or more process parameters may comprise one or more parameters from the group comprising RTP bake temperature, RTP bake time, furnace anneal temperature, furnace anneal time, and furnace anneal atmosphere.
The methods described above result in layered superlattice materials with excellent electronic properties. For example, ferroelectric layered superlattice materials with polarizabilities, 2Pr, higher than 25 microcoulombs per square centimeter have been fabricated. Numerous other features, objects and advantages of the invention will become apparent from the following description when read in conjunction with the accompanying drawings.